SAN MATEO, Calif.--(BUSINESS WIRE)--SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced that Dr. Yunsup Lee, CTO of SiFive, and Dr. Krste ...

The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

Join our daily and weekly newsletters for the latest updates and exclusive content on industry-leading AI coverage. Learn More SiFive, a processor design company pursuing the open hardware model of ...

A new whitepaper from NEC X delves into the world of unstructured data and explores how vector processors and their optimization software can help solve the challenges of wrangling the ever-growing ...

For those not immediately familiar with RISC-V, it is a relatively new CPU architecture which takes advantage of Reduced Instruction Set Computer (RISC) principles. RISC-V is an open standard ...

When there is talked about modern CPUs and GPUs the terms SIMD processor, Stream processor and Vector processor often pops up. I have been trying to figure out how these terms relate but its unclear ...

Ever since the “Aurora” vector processor designed by NEC was launched last year, we have been wondering if it might be used as a tool to accelerate workloads other than the traditional HPC simulation ...

RISC-V’s expanding role in AI is not a rejection of incumbent architectures, which continue to deliver performance and ...

A new technical paper titled “MultiVic: A Time-Predictable RISC-V Multi-Core Processor Optimized for Neural Network Inference” was published by researchers at FZI Research Center for Information ...

While most articles in this section discuss the reprogramming of graphics processors, other large arrays of processing elements are available as standard-product ICs for other applications. In some ...