GRENOBLE, France--(BUSINESS WIRE)--Hprobe, a provider of turnkey semiconductor Automatic Test Equipment (ATE) for magnetic devices, today announced a breakthrough magnetic test head revolutionizing ...

The high costs of building, resourcing and operating a foundry fabricating integrated circuits are well known. Fabless companies avoid this capital cost and focus on design and innovation in their ...

In the fast-paced world of semiconductor manufacturing, achieving higher yields and reducing costs are constant challenges. Ideally, yield should only be impacted by unavoidable defects when ...

Test-flow partitioning between wafer sort and final package test can have a dramatic impact on the cost of test. In some cases, the migration of package tests can be done over time, but the test ...

SANTA CLARA, Calif. — Looking to reduce the soaring costs of IC test, Intel Corp. hopes to leverage its “causal learning algorithm” technology for wafer sorting applications in the fab. Intel is ...

The back-end semiconductor manufacturing process refers to the IC packaging and testing that people often hear about. Specifically, the process known as chip probing (CP) is conducted to test the ...

FREMONT, Calif., March 21, 2011 (GLOBE NEWSWIRE) -- Aehr Test Systems (Nasdaq:AEHR), a worldwide supplier of semiconductor test and burn-in equipment, announced today that it has received over $2 ...

FREMONT, Calif., May 19, 2011 (GLOBE NEWSWIRE) -- Aehr Test Systems (Nasdaq:AEHR), a worldwide supplier of semiconductor test and burn-in equipment, announced today that it has received over $2 ...

Rapidus on Friday announced that it had begun prototyping of test wafers with 2nm gate-all-around (GAA) transistor structures at its IIM-1 facility in Japan. The company confirmed that early test ...